1. Field
Exemplary embodiments of the present invention relate to a semiconductor design technology, and more particularly, to a signal transmission circuit that transfers various signals through a plurality of signal transmission lines.
2. Description of the Related Art
In general, a semiconductor device, e.g., Double Data Rate Synchronous DRAM (DDR SDRAM), receives various signals from an external controller, performs a desired circuit operation, and outputs a result achieved through the circuit operation to an exterior. In this regard, the semiconductor device may have a signal transmission circuit for transferring such signals inside as well as the external controller. The object of the signal transmission circuit is to transfer a predetermined signal from a desired start point to a desired target point through a signal transmission line.
Meanwhile, with the development of a process technology, a line width of a signal transmission line is gradually reduced, and an interval between signal transmission lines is also gradually reduced. The development of the process technology may considerably reduce an area where the signal transmission lines are arranged, but may cause new concerns that may not be important factors in an operation of the conventional art.
Recently, one of the biggest concerns caused by the reduction of an interval between the signal transmission lines is a signal distortion due to crosstalk.
FIG. 1 is a circuit diagram illustrating a conventional signal transmission circuit.
Referring to FIG. 1, the signal transmission circuit includes a main driving unit 110 and a crosstalk equalizing driving unit 120.
The main driving unit 110 drives a first signal transmission line DQ1_OUT to a predetermined voltage level in response to a first input signal DQ1. The crosstalk equalizing driving unit 120 compensates for the first signal transmission line DQ1_OUT in response to second to fourth input signals DQ2, DQ3, and DQ4 that are transferred through second to fourth signal transmission lines adjacently arranged to the first signal transmission line DQ1_OUT.
As illustrated in FIG. 1, in the conventional art, the second to fourth input signals DQ2, DQ3, and DQ4 and second to fourth inverted and delayed input signals DQ2B, DQ3B, and DQ4B, which are achieved by inverting and delaying the second to fourth input signals DQ2, DQ3, and DQ4 respectively, are used in order to compensate for signal distortion of the first signal transmission line DQ1_OUT. That is, the crosstalk equalizing driving unit 120 reflects compensation values, which correspond to the second to fourth input signals DQ2, DQ3, and DQ4 and the second to fourth inverted and delayed input signals DQ2B, DQ3B, and DQ4B, in the first signal transmission line DQ1_OUT.
Hereinafter, signal distortion of an input signal will be described by employing the first and second input signals DQ1 and DQ2 as an example.
In the state in which the first input signal DQ1 and the second input signal DQ2 are transferred through signal transmission lines adjacent to each other, when the second input signal DQ2 is changed from logic ‘low’ level to logic ‘high’ level, signal distortion to logic ‘low’ level from logic ‘high’ level may occur in a first input signal DQ1 of a receiving circuit that receives the first and second input signals DQ1 and DQ2. Meanwhile, when the second input signal DQ2 is changed from logic ‘high’ level to logic ‘low’ level, signal distortion to logic ‘high’ level from logic ‘low’ level may occur in the first input signal DQ1 of the receiving circuit.
In this regard, a transmission circuit may have a circuit for compensating for the signal distortion, and the crosstalk equalizing driving unit 120 corresponds to the circuit for compensating for the signal distortion. That is, the crosstalk equalizing driving unit 120 adds the compensation values, which correspond to the second to fourth input signals DQ2, DQ3, and DQ4 and the second to fourth inverted and delayed input signals DQ2B, DQ3B, and DQ4B, to the first input signal DQ1 to generate a compensated first input signal, and transfers the compensated first input signal through the first signal transmission line DQ1_OUT. In other words, in order for the receiving circuit to receive a signal substantially equal to the first input signal DQ1, the signal transmission circuit should transfer a signal, which is achieved by adding the compensation value to the first input signal DQ1, through the first signal transmission line DQ1_OUT.
In the case of the structure as illustrated in FIG. 1, it may be desirable to increase the driving force of the crosstalk equalizing driving unit 120 in order to compensate for large signal distortion. However, the driving force is adjusted, resulting in a change in the impedance of the signal transmission circuit. That is, since the driving force of the crosstalk equalizing driving unit 120 and the impedance of the transmission circuit may be controlled in combination with each other, it may be difficult to adjust one of the driving force of the crosstalk equalizing driving unit 120 and the impedance of the transmission circuit. This represents that the driving force of the crosstalk equalizing driving unit 120 and the impedance of the transmission circuit are adjusted in a certain limited manner.
In more detail, for example, in the state in which the main driving unit 110 has a predetermined driving force, the driving force of the crosstalk equalizing driving unit 120 is set as a larger value in order to increase a compensation value, resulting in a change in the impedance of the signal transmission circuit. Therefore, for impedance matching, the driving force of the main driving unit 110 is set to be small. However, in this case, since the amplitude of an input signal transferred from the main driving unit 110 is reduced, it may be difficult for the receiving circuit to determine the input signal.
Recently, various technologies have been developed in order to transfer signals more apparently and quickly. Among them, there exist a pre-emphasis technology and a de-emphasis technology, which emphasize a specific part of a signal to be transferred. However, in the state in which the driving force and the impedance are adjusted in a given limited manner, it may be difficult to newly add a circuit for performing a de-emphasis operation.